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Computer Organization and Architecture MCQ Questions and Answers
1.
In Reverse Polish notation, expression A*B+C*D is written as
AB*CD*+
A*BCD*+
AB*CD+*
A*B*CD+
2.
SIMD represents an organization that ______________.
refers to a computer system capable of processing several programs at the same time.
represents organization of single computer containing a control unit, processor unit and a memory unit.
includes many processing units under the supervision of a common control unit
none of the above.
3.
Floating point representation is used to store
Boolean values
whole numbers
real integers
integers
4.
Suppose that a bus has 16 data lines and requires 4 cycles of 250 nsecs each to transfer data. The bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to 125 nsecs and the number of cycles required for transfer stayed the same what would the bandwidth of the bus?
1 Megabyte/sec
4 Megabytes/sec
8 Megabytes/sec
2 Megabytes/sec
5.
Assembly language
uses alphabetic codes in place of binary numbers used in machine language
is the easiest language to write programs
need not be translated into machine language
None of these
6.
In computers, subtraction is generally carried out by
9’s complement
10’s complement
1’s complement
2’s complement
7.
The amount of time required to read a block of data from a disk into memory is composed of seek time, rotational latency, and transfer time. Rotational latency refers to
the time its takes for the platter to make a full rotation
the time it takes for the read-write head to move into position over the appropriate track
the time it takes for the platter to rotate the correct sector under the head
none of the above
8.
What characteristic of RAM memory makes it not suitable for permanent storage?
too slow
unreliable
it is volatile
too bulky
9.
Computers use addressing mode techniques for _____________________.
giving programming versatility to the user by providing facilities as pointers to memory counters for loop control
to reduce no. of bits in the field of instruction
specifying rules for modifying or interpreting address field of the instruction
All the above
10.
The circuit used to store one bit of data is known as
Encoder
OR gate
Flip Flop
Decoder
11.
(2FAOC) 16 is equivalent to
(195 084) 10
(001011111010 0000 1100) 2
Both (A) and (B)
None of these
12.
The average time required to reach a storage location in memory and obtain its contents is called the
seek time
turnaround time
access time
transfer time
13.
Which of the following is not a weighted code?
Decimal Number system
Excess 3-cod
Binary number System
None of these
14.
The idea of cache memory is based
on the property of locality of reference
on the heuristic 90-10 rule
on the fact that references generally tend to cluster
all of the above
15.
Which of the following is lowest in memory hierarchy? Ans
Cache memory
Secondary memory
Registers
RAM
None of these
16.
The addressing mode used in an instruction of the form ADD X Y, is
Absolute
indirect
index
none of these
17.
If memory access takes 20 ns with cache and 110 ns with out it, then the ratio (cache uses a 10 ns memory) is
93%
90%
88%
87%
18.
In a memory-mapped I/O system, which of the following will not be there?
LDA
IN
ADD
OUT
19.
In a vectored interrupt.
the branch address is assigned to a fixed location in memory.
the interrupting source supplies the branch information to the processor through an interrupt vector.
the branch address is obtained from a register in the processor
none of the above
20.
Von Neumann architecture is
SISD
SIMD
MIMD
MISD
21.
Cache memory acts between
CPU and RAM
RAM and ROM
CPU and Hard Disk
None of these
22.
Write Through technique is used in which memory for updating the data
Virtual memory
Main memory
Auxiliary memory
Cache memory
23.
Generally Dynamic RAM is used as main memory in a computer system as it
Consumes less power
has higher speed
has lower cell density
needs refreshing circuitary
24.
In signed-magnitude binary division, if the dividend is (11100) 2 and divisor is (10011) 2 then the result is
(00100) 2
(10100) 2
(11001) 2
(01100) 2
25.
Virtual memory consists of
Static RAM
Dynamic RAM
Magnetic memory
None of these
26.
In a program using subroutine call instruction, it is necessary
initialise program counter
Clear the accumulator
Reset the microprocessor
Clear the instruction register
27.
A Stack-organised Computer uses instruction of
Indirect addressing
Two-addressing
Zero addressing
Index addressing
28.
If the main memory is of 8K bytes and the cache memory is of 2K words. It uses associative mapping. Then each word of cache memory shall be
11 bits
21 bits
16 bits
20 bits
29.
A-Flip Flop can be converted into T-Flip Flop by using additional logic circuit
n TQD =•
T D =
D = T . Q n
n TQD =?
30.
Logic X-OR operation of (4ACO) H & (B53F) H results
AACB
0000
FFFF
ABCD
31.
When CPU is executing a Program that is part of the Operating System, it is said to be in
Interrupt mode
System mode
Half mode
Simplex mode
32.
An n-bit microprocessor has
n-bit program counter
n-bit address register
n-bit ALU
n-bit instruction register
33.
Cache memory works on the principle of
Locality of data
Locality of memory
Locality of reference
Locality of reference & memory
34.
The main memory in a Personal Computer (PC) is made of
cache memory.
static RAM
Dynamic Ram
both (A) and (B)
35.
In computers, subtraction is carried out generally by
1’s complement method
2’s complement method
signed magnitude method
BCD subtraction method
36.
PSW is saved in stack when there is a
interrupt recognised
execution of RST instruction
Execution of CALL instruction
All of these
37.
The multiplicand register & multiplier register of a hardware circuit implementing booth’s algorithm have (11101) & (1100). The result shall be
(812) 10
(-12) 10
(12) 10
(-812) 10
38.
The circuit converting binary data in to decimal is
Encoder
Multiplexer
Decoder
Code converter
39.
A three input NOR gate gives logic high output only when
one input is high
one input is low
two input are low
all input are high
40.
_________ register keeps tracks of the instructions stored in program stored in memory.
AR (Address Register)
XR (Index Register)
PC (Program Counter)
AC (Accumulator)
41.
Memory unit accessed by content is called
Read only memory
Programmable Memory
Virtual Memory
Associative Memory
42.
‘Aging registers’ are
Counters which indicate how long ago their associated pages have been referenced.
Registers which keep track of when the program was last accessed.
Counters to keep track of last accessed instruction.
Counters to keep track of the latest data structures referred.
43.
The instruction ‘ORG O’ is a
Machine Instruction.
Pseudo instruction.
High level instruction.
Memory instruction.
44.
Translation from symbolic program into Binary is done in
Two passes.
Directly
Three passes.
Four passes.
45.
A floating point number that has a O in the MSB of mantissa is said to have
Overflow
Underflow
Important number
Undefined
46.
Logic gates with a set of input and outputs is arrangement of
Combinational circuit
Logic circuit
Design circuits
Register
47.
A k-bit field can specify any one of
3k registers
2k registers
K2 registers
K3 registers
48.
The time interval between adjacent bits is called the
Word-time
Bit-time
Turn around time
Slice time
49.
A group of bits that tell the computer to perform a specific operation is known as
Instruction code
Micro-operation
Accumulator
Register
50.
The load instruction is mostly used to designate a transfer from memory to a processor register known as
Accumulator
Instruction Register
Program counter
Memory address Register
51.
The communication between the components in a microcomputer takes place via the address and
I/O bus
Data bus
Address bus
Control lines
52.
An instruction pipeline can be implemented by means of
LIFO buffer
FIFO buffer
Stack
None of the above
53.
Data input command is just the opposite of a
Test command
Control command
Data output
Data channel
54.
A microprogram sequencer
generates the address of next micro instruction to be executed.
generates the control signals to execute a microinstruction.
sequentially averages all microinstructions in the control memory.
enables the efficient handling of a micro program subroutine.
55.
. A binary digit is called a
Bit
Byte
Number
Character
56.
A flip-flop is a binary cell capable of storing information of
One bit
Byte
Zero bit
Eight bit
57.
The operation executed on data stored in registers is called
Macro-operation
Micro-operation
Bit-operation
Byte-operation
58.
MRI indicates
Memory Reference Information.
Memory Reference Instruction.
Memory Registers Instruction.
Memory Register information
59.
Self-contained sequence of instructions that performs a given computational task is called
Function
Procedure
Subroutine
Routine
60.
Microinstructions are stored in control memory groups, with each group specifying a
Routine
Subroutine
Vector
Address
61.
An interface that provides a method for transferring binary information between internal storage and external devices is called
I/O interface
Input interface
Output interface
I/O bus
62.
Status bit is also called
Binary bit
Flag bit
Signed bit
Unsigned bit
63.
An address in main memory is called
Physical address
Logical address
Memory address
Word address
64.
If the value V(x) of the target operand is contained in the address field itself, the addressing mode is
immediate.
direct.
indirect.
implied.
65.
can be represented in a signed magnitude format and in a 1’s complement format as
111011 & 100100
100100 & 111011
011011 & 100100
100100 & 011011
66.
The instructions which copy information from one location to another either in the processor’s internal register set or in the external main memory are called
Data transfer instructions.
Program control instructions.
Input-output instructions.
Logical instructions.
67.
A device/circuit that goes through a predefined sequence of states upon the application of input pulses is called
register
flip-flop
transistor.
counter.
68.
The performance of cache memory is frequently measured in terms of a quantity called
Miss ratio.
Hit ratio.
Latency ratio.
Read ratio.
69.
The information available in a state table may be represented graphically in a
simple diagram.
state diagram.
complex diagram.
data flow diagram.
70.
Content of the program counter is added to the address part of the instruction in order to obtain the effective address is called.
relative address mode.
index addressing mode.
register mode.
implied mode.
71.
An interface that provides I/O transfer of data directly to and form the memory unit and peripheral is termed as
DDA.
Serial interface.
BR.
DMA.
72.
The 2s compliment form (Use 6 bit word) of the number 1010 is
111100.
110110.
110111.
1011.
73.
A register capable of shifting its binary information either to the right or the left is called a
parallel register.
serial register.
shift register.
storage register.
74.
Which of the following interrupt is non maskable
INTR.
RST 7.5.
RST 6.5.
TRAP.
75.
Which of the following is a main memory
Secondary memory.
Auxiliary memory.
Cache memory.
Virtual memory.
76.
Which of the following are not a machine instructions
MOV.
ORG.
END.
(B) & (C)
77.
In Assembly language programming, minimum number of operands required for an instruction is/are
Zero.
One.
Two.
Both (B) & (C)
78.
The maximum addressing capacity of a micro processor which uses 16 bit database & 32 bit address base is
64 K.
4 GB.
both (A) & (B)
None of these.
79.
The memory unit that communicates directly with the CPU is called the
main memory
Secondary memory
shared memory
auxiliary memory.
80.
A successive A/D converter is
a high-speed converter.
a low speed converter.
a medium speed converter.
none of these.
81.
When necessary, the results are transferred from the CPU to main memory by
I/O devices.
CPU.
shift registers.
none of these.
82.
A combinational logic circuit which sends data coming from a single source to two or more separate destinations is
Decoder.
Encoder.
Multiplexer.
Demultiplexer.
83.
In which addressing mode the operand is given explicitly in the instruction
Absolute.
Immediate .
Indirect.
Direct.
84.
A stack organized computer has
Three-address Instruction.
Two-address Instruction.
One-address Instruction.
Zero-address Instruction.
85.
A Program Counter contains a number 825 and address part of the instruction contains the number 24. The effective address in the relative address mode, when an instruction is read from the memory is
849.
850.
801.
802.
86.
A page fault
Occurs when there is an error in a specific page.
Occurs when a program accesses a page of main memory.
Occurs when a program accesses a page not currently in main memory.
Occurs when a program accesses a page belonging to another program.
87.
MIMD stands for _____.
Multiple instruction multiple data
Multiple instruction memory data
Memory instruction multiple data
Multiple information memory data
88.
. Logic gates with a set of input and outputs is arrangement of______.
Computational circuit
Logic circuit
Design circuits
Register
89.
. ‘Aging registers’ are _______. referenced.
Counters which indicate how long ago their associated pages have been
Registers which keep track of when the program was last accessed.
Counters to keep track of last accessed instruction.
Counters to keep track of the latest data structures referred.
90.
In a vectored interrupt. an interrupt vector.
the branch address is assigned to a fixed location in memory.
the interrupting source supplies the branch information to the processor through
the branch address is obtained from a register in the processor
none of the above
91.
The idea of cache memory is based ______.
on the property of locality of reference
on the heuristic 90-10 rule
on the fact that references generally tend to cluster
all of the above
92.
Computers use addressing mode techniques for ____________. memory counters for loop control
giving programming versatility to the user by providing facilities as pointers to
to reduce no. of bits in the field of instruction
specifying rules for modifying or interpreting address field of the instruction
All the above
93.
. The amount of time required to read a block of data from a disk into memory is composed of seek time, rotational latency, and transfer time. Rotational latency refers to ______. appropriate track
the time its takes for the platter to make a full rotation
the time it takes for the read-write head to move into position over the
the time it takes for the platter to rotate the correct sector under the head
none of the above
94.
. Assembly language ________.
uses alphabetic codes in place of binary numbers used in machine language
is the easiest language to write programs
need not be translated into machine language
None of these
95.
. SIMD represents an organization that ______________. time. unit and a memory unit.
refers to a computer system capable of processing several programs at the same
represents organization of single computer containing a control unit, processor
includes many processing units under the supervision of a common control unit
none of the above.
96.
. Data hazards occur when ……
Greater performance loss
Pipeline changes the order of read/write access to operands
Some functional unit is not fully pipelined
Machine size is limited
97.
. Which of the following registers is used to keep track of address of the memory location where the next instruction is located?
Memory Address Register
Memory Data Register
Instruction Register
Program Register
98.
. A complete microcomputer system consists of
microprocessor
memory
peripheral equipment
all of above
99.
. CPU does not perform the operation
data transfer
logic operation
arithmetic operation
all of above
100.
. Pipelining strategy is called implement
instruction execution
instruction prefetch
instruction decoding
instruction manipulation
101.
. A stack is during the execution of computer
an 8-bit register in the microprocessor
a 16-bit register in the microprocessor
a set of memory locations in R/WM reserved for storing information temporarily
a 16-bit memory address stored in the program counter
102.
. A stack pointer is memory.
a 16-bit register in the microprocessor that indicate the beginning of the stack
a register that decodes and executes 16-bit arithmetic expression.
The first memory location where a subroutine address is stored.
a register in which flag bits are stored
103.
. The branch logic that provides decision making capabilities in the control unit is known as
controlled transfer
conditional transfer
unconditional transfer
none of above
104.
. Interrupts which are initiated by an instruction are
internal
external
hardware
software
105.
. A time sharing system imply
more than one processor in the system
more than one program in memory
more than one memory in the system
None of above
106.
.Memory management technique in which system stores and retrieves data from secondary storage for use in main memory is called
fragmentation
paging
mapping
none of the mentioned
107.
.Program always deals with
logical address
absolute address
physical address
relative address
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