• 1. 
    RIM is used to check whether

  • The interrupt is Masked or not
  • The write operation is done or not
  • both 1 & 2
  • None of these
  • 2. 
    The cycle required to fetch and execute an instruction in a 8085 microprocessor is which one of the following?

  • Clock cycle
  • Memory cycle
  • Machine cycle
  • Instruction cycle
  • 3. 
    MOV B, A is a ________ addressing mode.

  • register
  • register indirect
  • Immediate
  • Direct
  • 4. 
    In assembly language program, one byte instruction will have ____ number of operands.

  • 1
  • 0
  • 2
  • 3
  • 5. 
    In an intel 8085A microprocessor, why is READY signal used?

  • To indicate to user that the microprocessor is working and is ready for use.
  • To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device.
  • To slow down a fast peripheral device so as to communicate at the microprocessor’s device.
  • None of the above.
  • 6. 
    The external system bus architecture is created using from ______ architecture:

  • Pascal
  • Dennis Ritchie
  • Charles Babbage
  • Von Neumann
  • 7. 
    Which one is NOT a Logical and Bit Manipulation instruction?

  • ANA B
  • ORA B
  • XRA B
  • DCR B
  • 8. 
    Priority interrupts of 8085a. TRAP b.RST 5.5 c.RST 7.5 d.RST 6.5 e.INTR

  • a,c,d,b,e
  • a,b,c,d,e
  • b,a,c,d,e
  • c,d,e,a,b
  • 9. 
    IO/M(active low) =0,S1=1,S0=1 resembles.

  • memory read
  • opcode fetch
  • memory write
  • I/O read
  • 10. 
    Pin number 35 in 8085 microprocessor is

  • IO/M(active low)
  • RESET IN(active low)
  • READY
  • CLK
  • 11. 
    Pin number 29 in 8085 microprocessor is

  • S0
  • S1
  • A15
  • RESET
  • 12. 
    ______ is needed to convert a high level language to machine language

  • compiler
  • assembler
  • browser
  • editor
  • 13. 
    Consider the followingI) Sign flag II) Trap flag III) Parity flag IV) Auxiliary carry flagWhich one of the above flags is/are present in 8085 microprocessor?

  • (I) only
  • (I) & (II)
  • (II) & (III)
  • (I) ,(III) & (IV)
  • 14. 
    8085 Instruction set has 76 opcodes(eg.MOV,MVI) and ____number of instructions

  • 200
  • 246
  • 250
  • 300
  • 15. 
    How many address lines in a 4096*8 EPROM CHIP?

  • 12
  • 11
  • 15
  • 16
  • 16. 
    What does the following pictorial representation of PUSH operation in the stack pointer indicate among the below stated conclusions/inferences?A. Stack Pointer is incremented by 2B. Location 55H in on-chip stack memory gets loaded with 44HC. Stack Pointer gets initialized by 56HD. Data Pointer gets loaded with an immediate data 44H which ultimately leads to initialization of stack pointer

  • only A
  • B & D
  • C & D
  • only B
  • 17. 
    ALU (Arithmetic and Logic Unit ) of 8085 microprocessor consists of

  • Accumulator, temporary register, arithmetic, logic circuits
  • Accumulator, temporary register, arithmetic, logic circuits and five flags
  • Accumulator, arithmetic, logic circuits and five flags
  • Accumulator, temporary register and five flags
  • 18. 
    Consider the following statements:In 8085 microprocessor, data-bus and address bus are multiplexed in order to I)Increase the speed of microprocessor. II)Reduce the number of pins. III)Connect more peripheral chips. Which of these statements is/are correct?

  • (I) only
  • (II) only
  • (II) & (III)
  • (I), (II), (III)
  • 19. 
    What is the status of stack pointer for the execution of PUSH and POP operations ?

  • It gets post-decremented for PUSH & pre-incremented for POP
  • It gets pre-incremented for PUSH as well as POP
  • It gets pre-incremented for PUSH & post-decremented for POP
  • It gets post-decremented for PUSH as well as POP
  • 20. 
    IO/M(active low )-- this signal is status signal to differentiate between I/O andmemory operation

  • Yes
  • NO
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